1. Field of the Invention
This invention relates to a high breakdown voltage MOS type semiconductor device and a method of fabricating the same and, more particularly, to a high breakdown voltage MOS type transistor device, a high breakdown voltage diffused resistor device, and a method of fabricating those devices.
2. Description of Related Art
As scale-down of semiconductor integrated devices proceeds in these days, not only MOS type transistors and memory devices but also semiconductor devices, such as peripheral circuits and input and output circuits, are fabricated in more shrunk size. MOS type high breakdown voltage semiconductor devices are used as microcontrollers for driving fluorescent display tubes, which are used as display devices of consumer products, such as video tuners, compact disc players, laser disc players, microwave ovens and the like. To drive such fluorescent display tubes, a power supply for about 30 Volt is generally required. Therefore, high breakdown voltage input and output circuits are needed in such semiconductor devices. As the size of display devices becomes larger, the number of the terminals of the high breakdown voltage input and output circuit increases, and amount of its drive current also increases. If this is tried to be satisfied, the periphery of the semiconductor chip tends to be entirely occupied with high breakdown voltage input and output circuits. Hence, miniaturization of the high breakdown voltage input and output circuits is inevitable for reducing the chip size of the semiconductor device. If the semiconductor device is fabricated in a smaller size, its breakdown voltage is generally lowered. Semiconductor devices for high breakdown voltage, therefore, must be designed so as to be enlarged up to a certain size or above in order to raise the breakdown voltage. This leads difficulty in scale-down of the high breakdown voltage semiconductor devices.
FIG. 7 shows a cross section of a structure of conventional, high breakdown voltage diffused resistor and conventional, high breakdown voltage transistor. A p-type high breakdown voltage semiconductor will be described herein as an example. The semiconductor substrate is an n-type silicon substrate or an n-well diffused layer formed in a p-type semiconductor substrate, having deep diffusion depth. Generally, diffusions for p- and n-type wells, necessary for CMOS devices, are conducted by high temperature heat treatment to form the diffusion depth from 3 to 5 micron meters. A p-type well diffused layer formed during this process may be used as a lightly doped diffused layer 3 of a high breakdown voltage diffused resistor. In the case where the semiconductor substrate 1 is formed of the n-type deeply diffused well, the diffusion depth of the well must be 10 micron meters or greater in order to secure its withstand voltage. To diffuse 10 micron meters or greater in depth, high temperature heat treatment of 60 hours or longer is required, so that it is not practical in conjunction with mass production. Moreover, since the diffusion depth of the lightly doped diffused layer 3 is deep as of 3 to 5 micron meters, this is disadvantageous to shrink the size of the diffused resistor. Accordingly, in order to shrink the semiconductor device in size, it is necessary to let the diffusion depth be around 1 to 3 micron meters, shallow, through setting the time for high temperature heat treatment for forming the diffused layer 3 about one hours. In such cases, the lightly doped diffused layer 3 can be formed in an n-well. Such high temperature heat treatment is, however, conducted as an additional process after diffusion processes for p-well and n-well at the beginning of whole fabrication processes.
Furthermore, in the diffused resistor, a lightly doped diffused layer 3 is formed so as to be adjacent to and at the periphery of a lightly doped diffused layer 4, and gate electrodes 5 are formed at the outer periphery of the lightly doped diffused layer 3. On the other hand, at the drain of the high breakdown voltage transistor, the lightly doped diffused layer 3 is formed at the periphery of a heavily doped diffused layer 2, and, gate electrodes are formed at the outer periphery of the lightly doped diffused layer 3. The heavily doped diffused layer 2 is formed during a process for heavily doped source and drain diffused layers of an ordinary CMOS process. The lightly doped diffused layer 4 used in the high breakdown voltage diffused resistor, can not be used for the drain of the high breakdown voltage transistor.
With the constitution of conventional devices, the high breakdown voltage transistor must have a large gate width for obtaining a large amount of output current for driving fluorescent display tubes. Hence, the size of the transistor is larger than that of the high breakdown voltage diffused resistor. That is, the size of the high breakdown voltage transistor is necessary to be reduced to shrink a portion for high breakdown voltage.